See:
WinFHDL
WinFHDL Simulation Instructions
The circuit description must be saved in a file with the suffix .ckt. For example: example1.ckt. The following UNIX command is used to generate the simulator. This command will create a C program that will simulate the circuit.
fhdl example1.ckt
The output of this command will be a file named example1.c, containing a C program. This file must be compiled using the following command..
cc example1.c -o example1
The program example1 will expect input vectors on stdin and will produce output vectors on stdout.. One way to simulate the circuit is to create a file named example1.vec containing the input vectors for the circuit, and run the following command.
example1 <example1.vec
Each test vector represents one set of inputs for the circuit. A vector consists of a set of binary or hexadecimal values separated by commas. Each vector must be on a separate line. One output vector will be printed for each input vector. The values for each of the primary inputs must be listed in the same order as they appear on the input statement (or statements). The following is a set of input (or output) vectors.
0,1,0,0
1,1,0,1
0,0,0,0
1,1,1,1
Blank lines and lines beginning with asterisks are treated as comments in a .vec file. These lines will be copied into the output file to assist you in reading the output.
More sophisticated users will wish to make use of extended features. Features currently available are the Algorithmic State Machine features, the ROM and PLA preprocessors, the FHDL macro processor, and the FHDL driver language. To invoke all FHDL functions, replace the fhdl command given above with the following command.
fhdl -n example1.ckt
This command has the added benefit of performing the cc command automatically for you. You may use this version of the command even if you do not use any of the additional FHDL features, although compilation time will be somewhat longer.