Gate Description Syntax

example

Each Functional Hardware Design Language (FHDL) statement has a label field, an operation code, and a list of operands:

The label field, which is optional, starts at the first character of a statement and ends with a colon (:).

The operation code must always be present and must be preceded by one or more spaces or tabs. If a label is present, the operation code follows the label.

The operand list, which is also optional, follows the operation code, and must be separated from the operation code by one or more spaces or tabs.

Every statement must be followed by a newline character (return key) or a semicolon (;). If it is necessary to extend an FHDL statement across several lines, every line except the last must end in a comma. Example

User-defined labels and names may contain upper and lower case letters, digits, underlines, and dollar signs.

To translate a logic diagram such as the following into FHDL, first choose unique names for each of the connections.

In this example the names A-H have been chosen for the connections. Next you must choose a unique name for the circuit (for this example we will choose example1.) The circuit description must begin with the following statement.

example1: circuit

Next make a list of the primary inputs and outputs of the circuit. In the example, A, B, C, and D are primary inputs while E is a primary output. An input statement is used to declare primary inputs, while an output statement is used to declare primary outputs. The following statements would be used for our example. (The keywords input and inputs are interchangable, as are output and outputs.)

  inputs A, B, C, D
  outputs E

Next describe each gate using an appropriate statement. In the example, one not statement, two and statements, and one or statement will be required. These statements do not require labels, but it is a good idea to use them anyway. The gates of our example would be written as follows.

g1: not A,H
g2: and (H,B),F
g3: and (C,D),G
g4: or (F,G),E

The order of the statements (including the input and output statements) is arbitrary. It’s possible to use more than one input or output statement. When this is done, the primary input and output lists are created by combining all names in the order that they are specified in the circuit. The input and output statements may appear anywhere in the circuit.

The operand list of a gate has two parts. The first part lists the gate's inputs while the second part lists the gate's outputs. If there is more than one input, the list of inputs must be enclosed in parentheses. (Example) Similarly if there is more than one output, the list of outputs must be enclosed in parentheses. (Example)

Finally, the circuit description must end with an endcircuit statement. The entire FHDL description is:

example1: circuit  
  inputs A,B,C,D
  outputs E
g1: not A,H
g2: and (H,B),F
g3: and (C,D),G
g4: or (F,G),E
  endcircuit  

FHDL provides many different kinds of gates. In most cases the order of the inputs and outputs is significant, although in this example, the order of the inputs does not matter. Subcircuits can be defined to provide gate types that are not provided by the FHDL system.