The FHDL Gate-Description Language

The FHDL Gate Description Language is the basic simulation language of the FHDL System. This help file documents the Gate Description Language and its features. Help is available on the following topics.

Statement Syntax

Gate Types

Creating and Using Subcircuits

Declaring Special Net Properties

Algorithmic State Machines

Simulating Circuits

Low-Level ROM Specifications

High-Level ROM Specifications

Low-Level PLA Specifications

High-Level PLA Specifications

Macro Processor Specifications

The Test Driver Language